Summary
We have discussed a broad range of hardware–software performance considerations in this chapter, all from a programmer's perspective. An architecture imposes some performance limitations, but relative weighting of various factors is highly implementation-dependent. Software strategies are ideally consonant with hardware capabilities. If not, the degradation in performance can be severe.
We sketched a programmer's view of hardware pipelines and discussed concepts such as hazards and dependencies with specific reference to the Itanium 2 processor implementation. RISC, VLIW, and EPIC architectures take different approaches to instruction-level parallelism to get the most out of superscalar CPU designs.
Software for Itanium systems must analyze ...
Get Itanium® Architecture for Programmers: Understanding 64-Bit Processors and EPIC Principles now with the O’Reilly learning platform.
O’Reilly members experience books, live events, courses curated by job role, and more from O’Reilly and nearly 200 top publishers.
