Exercises
| 1: | What are the chief causes of pipeline stalling? |
| 2: | What is meant by instruction-level parallelism? What are the characteristics of modern approaches towards its attainment? |
| 3: | The initial Itanium processor implementation contains only two M-units and two I-units. Which of the Itanium templates (Table 10-2) cannot be paired as the two bundles of instructions that would execute completely in parallel? |
| 4: | Prepare an illustration similar to Figure 10-2 showing how an Itanium 2 processor would execute the four bundles of instructions leading up to label done in the SCANFILE program as prepared by the particular assembler that you are using. |
| 5: | Show how to use the tnat instruction and predication in order to pull the recovery load for the first ... |
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