Summary

Computations for applications in science and engineering require the flexibility of scaling that floating-point representations provide. High-performance workstations and servers marketed, in part, for such applications usually incorporate support for floating-point operations.

RISC designs typically depart from the CISC tradition of one set of universal registers and instead provide a dedicated set of floating-point registers in a major section of the CPU devoted to IEEE floating-point operations. Partitioning of the CPU into floating-point and integer units can lead to performance gains of at least two sorts. First, the separate units can be designed with different depths of pipelining appropriate to the operations carried out by each. ...

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