Itanium® Architecture for Programmers: Understanding 64-Bit Processors and EPIC Principles

E.1. Interference from Explicit Stops

In this book, we have typically shown explicit stops (;;) separating Itanium instructions into groups, although we noted that the Intel assembler by default ignores stops written by the programmer and instead groups and bundles instructions automatically. In contrast, the assembler invoked by gcc expects the programmer to specify the architecturally required stops explicitly.

There is, however, an inconsistency within the assembler invoked by gcc (at least up through version 3.0) whereby explicit stops cannot be used with the directives described in this appendix. That is, parsing of instruction lines within macro or conditional blocks does not allow double semicolons.

While this situation may be ultimately ...