D.9. System Control Registers
Most computer architectures contain a psr (processor status) register as a single place where an operating system and hardware can keep track of the most critical aspects of machine state. It is the highest locus of control of the machine by an operating system.
For the Itanium architecture, bits <5:0> of the psr are synonymous with the user mask (Section D.7).
Bits <23:0> of the psr are called the system mask, and special instructions are provided to reset (rsm) or set (ssm) groups of bits in that 24-bit segment. For example, bit <14> permits an operating system to enable and disable hardware interrupts.
A privileged mov instruction can modify bits <31:0> of the psr. For example, a debugger program can set bit <24> ...
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