8.1 OBJECTIVES
The objectives of the chapter are to describe:
- Sequential logic circuits
- SR and DF latches
- SR, D, JK, and T flip-flops
- Shift and parallel registers
- Asynchronous and synchronous counters
Get Introduction to Digital Systems: Modeling, Synthesis, and Simulation Using VHDL now with the O’Reilly learning platform.
O’Reilly members experience books, live events, courses curated by job role, and more from O’Reilly and nearly 200 top publishers.
