4.1 OBJECTIVES

The objectives of the chapter are to:

  • Describe VHDL language programming
  • Describe CAD tools for digital system design
  • Describe hardware description languages
  • Provide a history of hardware description languages
  • Define VHDL
  • Describe the VHDL programming structure
  • Define entity
  • Define architecture
  • Describe VHDL data types
  • Describe VHDL operators
  • Describe Signal and generate statements
  • Describe sequential statements
  • Describe loops and decision-making statements
  • Describe Subcircuit design
  • Describe package and component statements

Get Introduction to Digital Systems: Modeling, Synthesis, and Simulation Using VHDL now with the O’Reilly learning platform.

O’Reilly members experience books, live events, courses curated by job role, and more from O’Reilly and nearly 200 top publishers.