Introduction to CMOS OP-AMPs and Comparators

CHAPTER 8

PRACTICAL CONSIDERATIONS AND DESIGN EXAMPLES

The design of low-cost and high-performance mixed-signal VLSI systems requires compact and power-efficient analog and digital library cells. While the digital library cells benefit from downscaling of the CMOS process technology, in contrast, analog library cells, such as op-amps and comparators, cannot be designed using minimum-length components, for reasons of gain, dc offset voltage, and other factors. Furthermore, the reduction of the power supply voltage in the tighter geometry technologies does not necessarily result in lower power dissipation in the analog cells, mainly because lower-voltage analog cells are more complex to design and they often require a larger quiescent current.

In Chapters 4 and 5 design techniques for high-performance CMOS op-amps and comparators were discussed in detail. In this chapter the design principles presented earlier in the book are employed to work out several design examples to acquaint the reader with the problems and trade-offs involved in op-amp and comparator designs. Practical considerations in CMOS op-amp design such as dc biasing, systematic offset voltage, power supply, and substrate noise coupling are discussed in some detail.

8.1. PRACTICAL CONSIDERATIONS IN CMOS OP-AMP DESIGN

In Section 4.1, several nonideal effects, which can degrade the performance of practical op-amps, were listed. The minimization of these effects is an important aspect of op-amp design. The corresponding ...