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Intel Xeon Phi Processor High Performance Programming, 2nd Edition by Avinash Sodani, James Reinders, James Jeffers

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Chapter 15

MPI

Abstract

Discusses MPI on Knights Landing, which has the same interfaces as on Intel Xeon processor based systems. Discusses how the characteristics of hybrid MPI/OpenMP performance may require tuning as the optimal balance of MPI ranks and OpenMP threads may vary.

Keywords

MIC architecture; Xeon Phi; MPI; Message passing interface; MPI rank; Offload; Hyperthreading; PGAS; OpenSHMEM; ITAC; MPS; PAPI

What is new with Knights Landing in this chapter?

Processor, Cluster Modes, Intel® Omni-Path architecture

Internode Parallelism

Most of this book focuses on intranode parallelism, while this chapter, Message Passing Interface (MPI), and Chapter 16, Partitioned Global Address Space (PGAS), focus on internode parallelism. Parallelism ...

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