IBM eServer zSeries 900 Technical Guide

60 IBM eServer zSeries 900 Technical Guide

The logical flow of an I/O operation is illustrated in Figure 2-18 on page 61, using a

CCW-based I/O operation as an example.

A CCW-based I/O operation is always initiated by a CP or an IFL. The operating system

issues a Start Subchannel (SSCH) instruction to pass the I/O request to the z900 Channel

Subsystem. The I/O request is placed in the supporting I/O subchannel, using an Unit Control

Word. UCWs are stored in the Hardware System Area of central storage and are moved to a

channel subsystem during execution of an I/O operation.

One of the System Assist Processors, a processing unit running specialized Licensed Internal

Code, is informed that there is an I/O request. The SAP then selects one of the defined

channels that have an online path to the device to execute the operation. A path rotation

algorithm is used to optimize access to multipath control units like disks and tapes.

The SAP passes the I/O request to the selected channel, via the MBA and STI which is

connect to the channel card. The selected channel determines if it is able to start the request

and if so, proceeds to address the required device over the attached channel path. Data

transfer either takes place from main storage to I/O (write operation) or from I/O to main

storage (read operation).

When the I/O operation is completed at the device level, the SAP is solicited to present

ending status to the CP or IFL on behalf of the channel.

All control communications between SAP and channels, and all data exchanges between

main storage and channels, use the z900 CSS structure:

򐂰 Memory Bus Adapter

򐂰 MBA Self Timed Interface ports

򐂰 Self Timed Interface cables

򐂰 For zSeries I/O cage (FC 2023):

– Self Timed Interface - Multiplexer (STI-M) card

– I/O cage internal wiring

– Channel cards

򐂰 For Compatibility I/O cage (FC 2022):

– Self Timed Interface - Multiplexer (STI-H) card

– Fast Interface Buffer (FIB) cards

– I/O cage internal wiring

– Channel Adapter (CHA) cards

– Channel cards

2.6.3 Channel Subsystem structure

The z900 CSS can have up to 256 channels and 256 Channel Path IDs (CHPIDs). A channel

path is a single interface between a processor and one or more control units along which

signals and data can be sent to perform I/O requests. A CHPID is a value assigned to each

channel path of the system that uniquely identifies that path to the system.

A channel path is assigned to a port on a channel card (see Figure 2-18, from bottom to top).