The A20 Mask
The A20M# input forces the processor to emulate the address wrap-around at the 1MB boundary that occurs on the 8086/8088 processors. This pin should only be asserted by external logic (under software control) when the microprocessor is in Real Mode. The x86 microprocessors mask physical address bit 20 (forces it to a zero) before performing a lookup to the internal cache or driving a memory bus cycle onto the buses. For additional information, see MindShare's ISA System Architecture book, published by Addison-Wesley.
The Legacy Method of Signaling A20M#
Figure 22-13 illustrates the legacy method of signaling A20 Mask to the processor, along with methods that software has to change the A20M# signal state:
Output pin from the keyboard ...
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