Chapter 21. Address Remapping

The Previous Chapter

HT is designed to support a variety of I/O and processor buses via bridges. The specification defines specific requirements for supporting PCI, PIC-X, AGP, and processor buses. The previous chapter discussed these support requirements.

This Chapter

The large 1 Terabyte HT address space may be outside the limits of a given processor or expansion bus. When address locations are mapped into the HT space that exceed the processor or expansion bus address space, then the addresses must be remapped to and from HT space. This chapter discusses the HT solution for remapping memory, MMIO, and I/O addresses.

The Next Chapter

Many HT platforms may be based on x86 processors. Compatibility support for these ...

Get HyperTransport™ System Architecture now with the O’Reilly learning platform.

O’Reilly members experience books, live events, courses curated by job role, and more from O’Reilly and nearly 200 top publishers.