Chapter 13. Device Configuration
The Previous Chapter
Reset signalling and timing, along with actions taken by the system and devices during reset, are the primary topics discussed in the previous chapter. The chapter also discussed software initiated reset and why it's required. The process of determining the default speed and link width and the subsequent software tuning of bus speed and link width are also detailed.
This Chapter
HyperTransport uses PCI configuration. This chapter describes HyperTransport technology configuration for host bridges, tunnels, and end (cave) devices. These devices use the type 0 configuration header format, while HyperTransport-to-HyperTransport bridges and bridges between HyperTransport and other PCI compatible ...
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