HyperTransport™ System Architecture

Introduction

Signals on each HyperTransport link fall into two groups: high speed signals associated with the sending and receiving of control and data packets, and miscellaneous low-speed signals required for such things as reset and power management. Whereas the low speed signals are not scalable and employ conventional low voltage CMOS signalling, the high speed signal group is scalable in terms of both bus width and clock rate, and each signal is actually a low-voltage differential signal pair.

While device pin count varies with scaling, signal group functions remain the same; the only real difference in signaling over a 32-bit link vs. a 2-bit link is the number of bit times required to shift information onto the bus.