The System's Virtual Address Space
The VAS is an organizational concept that allows the implementation of shared and private memory objects through a single level of address abstraction. This approach is part of the PA-RISC processor design and is supported in the HP-UX kernel code as part of its hardware-dependent layer. As we learned in our discussion of PA-RISC computing platforms, the VAS is conceptually arranged as a large grid, and each column represents a unique virtual space containing four quadrants (represented by four rows).
In Figure 6-2, we see the practical application of this VAS model. As a process uses its vas and pregions to map various memory objects to specific offsets within its logical memory view, these objects are mapped ...
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