Chapter 6. Channel Voltage and Timing Budget
Dan Oh and Chuck Yuan
Previous chapters have discussed the accurate modeling of passive channel structures. The following chapters focus on the analysis and simulation aspects of the channel. The ultimate goal of signal integrity (SI) design is to determine whether the I/O channel under study can meet the target performance requirements under the worst-case operating conditions. To that end, one needs to perform analysis beyond the traditional modeling of devices and passive channel. A few key questions to answer are:
• What are the adequate voltage and timing budgets for a target system to ensure reliable link performance while avoiding system overdesign?
• How do we ensure that the high-volume production ...
Get High-Speed Signaling: Jitter Modeling, Analysis, and Budgeting now with the O’Reilly learning platform.
O’Reilly members experience books, live events, courses curated by job role, and more from O’Reilly and nearly 200 top publishers.
