Acknowledgments

First and foremost I thank my wife, Serene, for her patience, understanding, and encouragement. Her love and support sustained me through this long and lonely journey. I also thank my parents, Grace and James Lam, for their continuing guidance and support.

I am grateful to the many reviewers who spent their valuable time and effort reading the manuscript and pointing out errors and improvements. In particular, I thank Rajeev Alur, K. C. Chen, Thomas Dillinger, Manoj Gandhi, Yu-Chin Hsu, Sunil Joshi, Shrenik Mehta, Vigyan Singhal, Ed Liu, Paul Tobin, and John Zook for their insightful comments, suggestions, and encouraging words. The Web site for Verilog freeware was suggested by Thomas Dillinger. Furthermore, I appreciate the enthusiasm ...

Get Hardware Design Verification: Simulation and Formal Method-Based Approaches now with the O’Reilly learning platform.

O’Reilly members experience books, live events, courses curated by job role, and more from O’Reilly and nearly 200 top publishers.