Ultrafast Nanophotonic Devices For Optical Interconnects

N. N. Ledentsov

VI-Systems GmbH, Hardenbergstrasse 7, D-10623 Berlin, Germany

1.   Introduction

The ever-growing serial transmission speed of electrical interfaces is primarily driven by an increase in the microprocessor bandwidth caused by silicon scaling. As the density of transistors doubles every two years, the processor bandwidth increases, and the speed of the input/output (I/O) ports must increase. Moore’s Law for data communications predicts that a four-fold increase in the I/O speed is needed each 4-5 years. This scaling of speed imposes severe challenges to both copper and standard low-cost optical interconnects, which are presently limited to bit rates of ~10 Gb/s.

At the same time, according to the IEEE Ethernet Roadmap (Fig. 1) the single I/O bit rate should approach 100 Gb/s by 2017 while the aggregated transmission rate will increase to 5 Tb/s. At I/O speeds of 5–10 Gb/s, copper cables and connectors are becoming too energy consuming and bulky, so a massive deployment of optical interconnects is already starting.

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Figure 1. IEEE Roadmap for the core and I/O bit rates.

*On leave from Ioffe Physical-Technical Institute of Russian Academy of Sciences, St. Petersburg 194021, Russia.

2.   Recent progress in optical components

Very short-range optical links are presently served by multimode vertical-cavity surface-emitting ...

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