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From ASICs to SOCs: A Practical Approach by Faranak Nekoogar, Farzad Nekoogar

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4.3. Some Tips and Guidelines for Physical Design

The following are some guidelines for hierarchical design structures. For designs larger than two million gates, some hierarchical plus partitioned design methodology should be used. The fact that parallel processing is performed makes hierarchical methodology an attractive implementation for physical designs.

Use Placement-Based Synthesis

As we discussed in Chapter 2 for designs larger than two million gates, a placement-based synthesis approach must be taken. Figure 4.4 shows the design flow for a placement-based synthesis.

Figure 4.4. Design Flow with Placement-Based Synthesis

Logical versus ...

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