From ASICs to SOCs: A Practical Approach

2.3. FPGA to ASIC Conversion

In order to bring down the cost of systems, vendors convert their FPGA designs into ASICs. In some cases, multiple FPGAs are integrated into a single ASIC. Some ASIC vendors match the exact package and pinout of the original FPGA designs.

The market targeted for these migrations is the middle ground of the ASIC market. ASIC variations that are offered include gate array/embedded array and standard-cell technologies, multimetal-layer processing, high-speed operation, low-power and low-voltage operation.

Figure 2.6 shows a typical conversion flow from FPGA to ASIC. The FPGA netlist typically comes in the form of Verilog, EDIF, VHDL, or XNF.

Figure 2.6. FPGA to ASIC Conversion Flow

Design analysis usually consists of ...