FPGAs: World Class Designs

Chapter 4. Modeling Memories

This chapter comes to us from the book ASIC and FPGA Verification by Richard Munden, ISBN: 9780125105811. Richard has been using and managing CAE systems since 1987, and he has been concerned with simulation and modeling issues for just as long. Richard cofounded the Free Model Foundry (http://eda.org/fmf/) in 1995 and is its president and CEO. In addition to his real (daytime) job, Richard is a well-known contributor to several EDA users groups and industry conferences. His primary focus over the years has been verification of board-level designs.ASIC and FPGA Verification covers the creation and use of models useful for verifying ASIC and FPGA designs and board-level designs that use off-the-shelf digital components. ...