In an Instant
- Schematic-based Design Flows
- Back-end Tools like Layout
- CAE + CAD=EDA
- A Simple (early) Schematic-driven ASIC Flow
- A Simple (early) Schematic-driven FPGA Flow
- Flat versus Hierarchical Schematics
- Schematic-driven FPGA Design Flows Today
- HDL-based Design Flows
- Advent of HDL-based Flows
- A Plethora of HDLs
- Points to Ponder
- Instant Summary
Let's begin as usual by defining some terms we'll encounter in this chapter.
- Schematic is the common name for a circuit diagram.
- Logic minimization or optimization means replacing one group of gates with another that will perform the same task faster or use less real estate on the silicon.
- Gate-level design refers to a design represented ...