13

Low Power FPGA Implementation

13.1 Introduction

As has been indicated in the introduction to this book, a lot has been made about improving technology and how this has offered increased numbers of transistors, along with improving the speed of the individual transistors. This has been central to the growth of FPGA technology and largely responsible for the change in constitution of FPGA technology during the emergence of platform SoC devices. This technological evolution has been largely responsible for driving the success of FPGA technology as the programmability aspect allows the user to develop circuit architectures with a high levels of parallelism and pipelining that are ideally suited to DSP applications. This degree of control allows the user to produce high performance without the need to resort to high clock rates as in processor implementations.

One issue that deserves special attention is power consumption. Power consumption scales down with technology evolution, which would suggest that it should be less of an issue. The problem, though, is that the number of transistors that can be associated with a single implementation has also increased, thereby increasing the power consumed by a single chip. However, this represents only one aspect of the problem. The major issue is that the nature of how power is consumed in silicon chips is changing as technology evolves, and this has severe implications for FPGAs. One trend is that the leakage power which was treated as negligible ...

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