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Field-Programmable Gate Arrays: Reconfigurable Logic for Rapid Prototyping and Implementation of Digital Systems by Richard C. Dorf, John V. Oldfield

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3.5   VLSI PRIMITIVES

In the previous sections we have considered some important current FPGA devices: many of their key architectural features are predicated on the primitives of the implementation technology.

3.5.1   Function Units

The function units of today's configurable logic devices are based on several techniques:

  1. RAM lookup tables: In this structure the input variables are used to select values from a RAM memory that has been preloaded with values representing the truth table of the function to be implemented. Thus all possible functions of the input variables can be implemented. Selection can use the RAM addressing mechanism in appropriately structured devices or a separate decoder taking its data inputs from RAM Q outputs. This structure offers area efficiency and predictable delays which scale well as the number of inputs is increased. It is the structure of choice for function units that attempt to implement all functions of four or more variables. An additional advantage is that it is possible with some extra overhead to allow the lookup table RAM to be used as a RAM within a user's design. The disadvantages of this implementation technique are:

    (a) If the RAM addressing mechanism is used to select a lookup table output, it is difficult to organize the control store as a conventional static RAM, as is done in most of the computational logic arrays. Thus the advantages of random access to the control store for partial reconfiguration and access to internal state are ...

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