Index

2-bit

2-input

2-sigma

2-stack

3/Berkley SPICE

3-bit

3-sigma

3-stack

4-bit

5+-sigma

5-track

6-track

7-track

8-track

9-track

20-nano-meter

45-degree

64-bit LFSR

65-nanometer

80-nanometer

90-nanometer

105-nanometer

130-nanometer

180-nanometer

350-nanometer

ACTIVE

ADC/DAC

ADDER

Adder

Analog

AND/NAND

AND

ANDING

ANDs

AOAI

AOAOI

AOI

AOI12

AOI21

AOI21X1

AOI22

AOI222

AOI321

AOI321X1

AOI333

APR

Arcs, Power

Arcs, Timing

ASCII

ASIC

Asymptotic Performance

ATPG

Aviation

Backus-Naur

BER

Best-case

Binary

BIST

Bit-cell

BNF

Boolean

Boutique Library

Break-point

BSIM

BSIM3/BSIM4

BSIM3

BSIM4

BUF

Buffers

Bugs

Built-in

BULK_CONNECTION

Bulk

Bus

Bus-Hold

CAD

Cadence

CAM

Capacitors

Carrier

CARRY

CCS

CDL

CDM

CDMA

CGSO

Characterization

Charge

Checksum

Chemical/Mechanical

CIR

Circuit

Clock-tree

CML

CMOS

CMP

CMP-fill

Combinational

CONTACTs

CORE-FILL

Core-fill

CRC

CRC-32

CRGTOL

Cyclic-redundancy check

DAC

DATACOM

Data-path

Data-structure

DC_shell

DDK

DDL

DDR/GDDR

DDR

DDR1/2/GDDR3

DDR2

DECAP

Decoupling

DEF

Default

Density

Dependent

DEPOSITION

DESIGN

Deterministic

Development/Validation

Device

DFF

DFM

DFT

Diamond

Digital

DOTFILE

Downloading

DRAIN_CONNECTION

DRC/LVS/LPE

DRC

Drive-strengths

DSP

Dual

DUT

Ebers-Moll

EDA

Edge-rate

ElectroStatic

EM

EMI

Enabled AND

Enabled OR

Endcap

Error

ESD

Ethernet

EXCEL

EXNOR

EXOR

Extraction

Eye-diagram

FAA

Fabrication

Failure analysis

FDDI

FIB

Fiber

Fibonacci

Flash

FLIP-FLOP

Footprint

Fortran

FOUR_BIT_ADD

Frankenstein Flow

FULL_ADD

Fuzzy

Gasket

GATE_CONNECTION

Gate-level ...

Get Engineering the CMOS Library: Enhancing Digital Design Kits for Competitive Silicon now with the O’Reilly learning platform.

O’Reilly members experience books, live events, courses curated by job role, and more from O’Reilly and nearly 200 top publishers.