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Engineering the CMOS Library: Enhancing Digital Design Kits for Competitive Silicon by DAVID DOMAN

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CHAPTER 15

VALIDATION

15.1 LESSON FROM THE REAL WORLD: THE MANAGER’S PERSPECTIVE AND THE ENGINEER’S PERSPECTIVE

In integrated circuit (IC) engineering, otherwise interchangeable terms such as verification and validation are used to identify divergent activities. Verification is the testing and assurance that the various views of the library represent different aspects (see Figures 13.1 and 13.2) of the same platonic function. The various views play together well. Validation is the testing and assurance that these views map directly to postprocessing physical reality—that is, they meet physical goals.

For the library development and support engineering team, this is a two-step process:

1. The views map to the desired models and decks that are represented in the physical design kit (PDK), and

2. The density, power, performance, noise, and yield goals of the libraries are actually achieved through testing.

Both steps are or should be continuous processes.

Several years ago, I was working at a company that believed that the library design effort, by the library design and support team, was completely out of control. Invariably, whenever a new SPICE model would be released from the PDK development and support team (the company had internal fabrication facilities), the customer base, all of them internal design centers, would be shocked to find that the liberty files were not concurrently released. Whenever these new liberty characterization files were released, they were often slower ...

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