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Engineering the CMOS Library: Enhancing Digital Design Kits for Competitive Silicon by DAVID DOMAN

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CHAPTER 6

PHYSICAL VIEWS

6.1 LESSON FROM THE REAL WORLD: THE MANAGER’S PERSPECTIVE AND THE ENGINEER’S PERSPECTIVE

I was taught to program in the 1970s, an age when the cost of silicon-based memory was relatively expensive. As an example, a program that I submitted for a project was marked downward because I had used a byte instead of a bit in order to store a true–false value. For comparison, UNIX core kernels were compiled in less than 64 kilobytes of storage space during the same period. I argued with the teacher that there was no other true–false variable in the program and that making the variable a bit would take up just as much room in the computer memory, but I was told that if this program later became a subroutine in a larger program, then my argument might not be valid. I sometimes think back on that programming class when I see how large the current software packages are for the home PC. At any rate, after the lesson the particular software teacher gave to me, I have always translated into my hardware and, specifically, library efforts.

Several years ago, I was tasked to design a 90-nanometer stdcell library for a large microprocessor company, emphasizing density over performance or power. The company had previous used an outside library vendor for designing, developing, and supplying the stdcell library at the 130-nanometer technology node. Several key members of the division management team felt that had gotten their money’s worth at the 130-nanometer node. They felt ...

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