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Engineering the CMOS Library: Enhancing Digital Design Kits for Competitive Silicon by DAVID DOMAN

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CHAPTER 3

IO LIBRARIES

3.1 LESSON FROM THE REAL WORLD: THE MANAGER’S PERSPECTIVE AND THE ENGINEER’S PERSPECTIVE

Several years ago, I was asked to build all of the possible offerings out of a company’s Input–Output (IO) compiler. The compiler was old and unsupportable. The engineer who had originally built it had long since retired or moved on, and upper management wished to get rid of it. The tool had some interesting features. Designers could choose various input and output options but could also get various strength pull-up and pull-down resistors that would be integrated within the placement boundary of the resulting IOs. Although from a usefulness point of view this was a “nice to have” feature, it allowed several small issues to creep into the resulting design. Specifically, the IO produced, whether specified as a pure input or a pure output, was actually a full tri-statable IO. Also, every IO, whether or not it had a pull-up resistor, a pull-down resistor, or a bus-hold circuit specified as needing to be attached to the pad, actually had all of these, including various strength versions of each, attached to the pad. In addition, the cells were huge. All of the circuitry for all of the various drive strengths was present in all of the IOs, and because the IOs were the same width, the IOs were nothing more than metal connection gate-array structures as opposed to true stdcell IO structures. Management had told me that it thought that there were more than 1,400 different IOs ...

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