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Engineering the CMOS Library: Enhancing Digital Design Kits for Competitive Silicon by DAVID DOMAN

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CHAPTER 1

INTRODUCTION

In a positive sense, this book is about gaining a competitive edge in the integrated circuit marketplace. What it will suggest to the reader is that there is unrecognized value hidden in the safety-net margins that exist in the various descriptive views of any piece of intellectual property. This hidden value, which might be useful on any given integrated circuit design, can normally be left “on the table.” However, this hidden value can and should be used by the aggressive design engineer (or manager) to beat market competitors. The pages ahead will reveal how the typical design house can enhance the performance, reduce the power, and improve the density of standard-cell logic. It will show how to add value to the generic, foundry-provided standard-cell library that many companies use “out of the box.” It will identify low-risk opportunities where aggressive designers and managers can shave off margin from overdesigned standard cells.

However, the other side of the preceding is also true. That is to say, this is a dangerous book. The reason it is dangerous is that no engineer or manager has ever been fired because of not following the herd and either accomplished or failed to accomplish exactly what any other engineer or manager accomplished or failed to accomplish. The not-so-hidden message of this book is that by breaking from the herd and attempting to use that safety net margin, wherever it is found, the results, when successful, will reap market benefit. ...

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