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Engineering the CMOS Library: Enhancing Digital Design Kits for Competitive Silicon by DAVID DOMAN

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APPENDIX III

DEFINITION OF TERMS

APR Automated place and route.
ASCII A human-readable way of representing information. Most digital design kit (DDK) views are ASCII based.
ASIC Application Specific Integrated Circuit; the majority of modern integrated circuits, other than custom-designed devices such as microprocessors.
ATPG Automatic test pattern generation.
BER Bit error rate.
BIST Built-in self-test.
BNF Backus-Naur format. Formal definition of a computer language.
BSIM3/BSIM4 Berkley short-channel IGFET model versions 3 and 4
CDM Charged device model of ESD testing
CMOS Complimentary metal-oxide semiconductor.
CRC Cyclic-redundancy check. An unsecure error-detection coding scheme often used in communication channels that can be used for checksum operations within library file deliveries.
DDK Digital design kit. Usually a collection of stdcells, IOs, possibly some SSI-level analog functions (such as PLLs) and some memory compilers, together with a set of separate views compatible with engineering design automation (EDA) tools for use in logical, physical, temporal and test development of integrated circuits.
DDR Double data rate.
DRC Design rule check (physical verification deck).
Ebers-Moll Early bipolar SPICE model
EDA Engineering design automation. An industry geared to the creation of design tools for use in the integrated-circuit design environment.
ESD Electrostatic discharge.
FDDI Fiber-distributed data interface.
GDDR Graphics ...

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