Emerging Nanoelectronic Devices

18NEMS Switch Technology

Louis Hutin and Tsu-Jae King Liu

Department of Electrical Engineering and Computer Sciences, University of California, USA

18.1 Electromechanical Switches for Digital Logic

18.1.1 Addressing the CMOS Power Crisis

For about four decades, increasing transistor density (thereby increasing chip functionality and lowering cost per function) has been carried out following a set of relatively simple transistor scaling rules [1–3]. These “constant field” device scaling guidelines were purposefully designed so that active power consumption would scale with area, hence keeping the power density constant. However, scaling the supply voltage V_DD with no penalty in terms of circuit speed requires the ability to maintain a sufficient gate overdrive (V_DD–V_T, defining the on-state resistance of a transistor). Unfortunately, there is a fundamental limit on how much the threshold voltage V_T can be reduced without causing an exponential increase in leakage current, and therefore passive power density. This limit is a direct consequence of a MOSFETs subthreshold current–voltage relationship (Figure 18.1).

Figure 18.1 (a) Schematic typical I_D-V_GS of an nMOSFET. The un-scalable subthreshold swing makes I_OFF increase exponentially for a linear V_T shift towards 0 V. With V_T fixed, a reduction of V_DD provokes a decrease in I_ON. (b) V_DD and V_T scaling down to the 65 nm CMOS ...