Embedded Systems Architecture

Order of memory transactions

On ARM CPUs, the memory system does not guarantee that the memory transactions are executed in the same order of the instructions that generate them. The order of memory transactions can be altered to adjust to the characteristics of the hardware, such as the wait states required to access underlying physical memory, or by the speculative branch prediction mechanisms implemented at microcode level. While Cortex-M microcontrollers guarantee a strict ordering of the transactions involving the peripherals and the system regions, in all other cases the code must be instrumented accordingly, by putting adequate memory barriers to ensure that the previous memory transactions have been executed before executing the next ...