Once the bus clocks are available, the RCC logic can be programmed to distribute the clock to single peripherals. To do so, the RCC exposes bit-mapped peripheral clock source registers. Setting the corresponding bit in one of the registers enables the clock for each mapped peripherals in the microcontroller. Each register can control clock gating for 32 peripheral.
The order of the peripherals, and consequently the corresponding register and bit, are strictly dependent on the specific microcontrollers. The STM32F4 has three registers dedicated to this purpose. For example, to enable the clock source for the internal watchdog, it is sufficient to set the bit number 9 in the clock enable register at address 0x40021001c:
