You are previewing Embedded Software.
O'Reilly logo
Embedded Software

Book Description

The Newnes Know It All Series takes the best of what our authors have written to create hard-working desk references that will be an engineer's first port of call for key information, design techniques and rules of thumb. Guaranteed not to gather dust on a shelf!

Embedded software is present everywhere - from a garage door opener to implanted medical devices to multicore computer systems. This book covers the development and testing of embedded software from many different angles and using different programming languages. Optimization of code, and the testing of that code, are detailed to enable readers to create the best solutions on-time and on-budget. Bringing together the work of leading experts in the field, this a comprehensive reference that every embedded developer will need!

Chapter 1: Basic Embedded Programming Concepts
Chapter 2: Device Drivers
Chapter 3: Embedded Operating Systems
Chapter 4: Networking
Chapter 5: Error Handling and Debugging
Chapter 6: Hardware/Software Co-Verification
Chapter 7: Techniques for Embedded Media Processing
Chapter 8: DSP in Embedded Systems
Chapter 9: Practical Embedded Coding Techniques
Chapter 10: Development Technologies and Trends

*Proven, real-world advice and guidance from such "name" authors as Tammy Noergard, Jen LaBrosse, and Keith Curtis
*Popular architectures and languages fully discussed
*Gives a comprehensive, detailed overview of the techniques and methodologies for developing effective, efficient embedded software

Table of Contents

  1. Copyright
  2. Newnes Know It All Series
  3. About the Authors
  4. Introduction
    1. I.1. Development Challenges
      1. I.1.1. Multiple Processors
      2. I.1.2. Limited Memory
      3. I.1.3. User Interface
    2. I.2. Reusable Software
      1. I.2.1. Software Components
    3. I.3. Real-Time Operating System
      1. I.3.1. RTOS Selection Factors
      2. I.3.2. RTOS Standards
    4. I.4. File System
    5. I.5. Universal Serial Port (USB)
    6. I.6. Graphics
    7. I.7. Networking
    8. I.8. IPv6
      1. I.8.1. Who Needs a Web Server?
      2. I.8.2. SNMP
    9. I.9. Conclusion
  5. 1. Basic Embedded Programming Concepts
    1. 1.1. Numbering Systems
      1. Example 1.1
      2. Example 1.2
      3. Example 1.3
      4. 1.1.1. Binary Numbers
        1. Example 1.4
    2. 1.2. Signed Binary Numbers
      1. Example 1.5
      2. 1.2.1. Fixed-Point Binary Numbers
        1. Example 1.6
      3. 1.2.2. Floating-Point Binary Numbers
      4. 1.2.3. Alternate Numbering Systems
      5. 1.2.4. Binary-Coded Decimal
      6. 1.2.5. ASCII
      7. 1.2.6. Error Detection
    3. 1.3. Data Structures
      1. 1.3.1. Simple Data Types
        1. Declaration 1.1
        2. Code Snippet 1.1
        3. Declaration 1.2
        4. Declaration 1.3
        5. Declaration 1.4
        6. Declaration 1.5
        7. Code Snippet 1.2
      2. 1.3.2. Complex Data Types
        1. Declaration 1.6
        2. Definition 1.1
        3. Declaration 1.7
        4. Declaration 1.8
        5. Declaration 1.9
        6. Declaration 1.10
        7. Code Snippet 1.3
        8. Code Snippet 1.4
        9. Declaration 1.11
        10. Memory 1.1
    4. 1.4. Communications Protocols
      1. 1.4.1. Simple Data Broadcast
      2. 1.4.2. Event-Driven Single Transfer
      3. 1.4.3. Event-Driven Multielement Transfers
    5. 1.5. Mathematics
      1. 1.5.1. Binary Addition and Subtraction
        1. Example 1.7
        2. Example 1.8
      2. 1.5.2. Binary Multiplication
        1. Example 1.9
        2. Example 1.10
        3. Algorithm 1.1
      3. 1.5.3. Binary Division
        1. Example 1.11
        2. Example 1.12
        3. Algorithm 1.2
    6. 1.6. Numeric Comparison
      1. 1.6.1. Conditional Statements
        1. Code Snippet 1.5
        2. Code Snippet 1.6
        3. Code Snippet 1.7
        4. Code Snippet 1.8
        5. Code Snippet 1.9
        6. Code Snippet 1.10
        7. Code Snippet 1.11
        8. Code Snippet 1.12
      2. 1.6.2. Loops
        1. Code Snippet 1.13
        2. Code Snippet 1.14
        3. Code Snippet 1.15
      3. 1.6.3. Other Flow Control Statements
    7. 1.7. State Machines
      1. Code Snippet 1.16
      2. Algorithm 1.3
      3. 1.7.1. Data-Indexed State Machines
        1. Code Snippet 1.17
        2. Code Snippet 1.18
      4. 1.7.2. Execution-Indexed State Machines
        1. Code Snippet 1.19
        2. Code Snippet 1.20
        3. Code Snippet 1.21
        4. Code Snippet 1.22
        5. Code Snippet 1.23
        6. Code Snippet 1.24
        7. Code Snippet 1.25
        8. Code Snippet 1.26
      5. 1.7.3. Hybrid State Machines
        1. Code Snippet 1.27
    8. 1.8. Multitasking
      1. 1.8.1. Four Basic Requirements of Multitasking
        1. 1.8.1.1. Context Switching
        2. 1.8.1.2. Communications
        3. 1.8.1.3. Managing Priorities
        4. 1.8.1.4. Timing Control
        5. 1.8.1.5. Operating Systems
        6. 1.8.1.6. State Machine Multitasking
  6. 2. Device Drivers
    1. 2.1. In This Chapter
    2. 2.2. Example 1: Device Drivers for Interrupt-Handling
      1. 2.2.1. Interrupt Priorities
      2. 2.2.2. Context Switching
      3. 2.2.3. Interrupt Device Driver Pseudo Code Examples
        1. 2.2.3.1. Interrupt-Handling Startup (Initialization) MPC860
        2. 2.2.3.2. Initializing CPM for Interrupts—4 Step Process
        3. 2.2.3.3. Interrupt-Handling Shutdown on MPC860
        4. 2.2.3.4. Interrupt-Handling Disable on MPC860
        5. 2.2.3.5. Interrupt-Handling Enable on MPC860
        6. 2.2.3.6. Interrupt-Handling Servicing on MPC860
      4. 2.2.4. Interrupt-Handling and Performance
    3. 2.3. Example 2: Memory Device Drivers
      1. 2.3.1. Memory Management Device Driver Pseudo Code Examples
        1. 2.3.1.1. Memory Subsystem Startup (Initialization) on MPC860
          1. 1. Initializing the Memory Controller and Connected ROM/RAM
          2. 2. Initializing the Internal Memory Map on the MPC860
          3. 3. Initializing the MMU on the MPC860
        2. 2.3.1.2. Memory Subsystem Disable on MPC860
        3. 2.3.1.3. Memory Subsystem Enable on MPC860
        4. 2.3.1.4. Memory Subsystem Writing/Erasing Flash
    4. 2.4. Example 3: Onboard Bus Device Drivers
      1. 2.4.1. Onboard Bus Device Driver Pseudo Code Examples
        1. 2.4.1.1. I2C Bus Startup (Initialization) on the MPC860
    5. 2.5. Board I/O Driver Examples
      1. 2.5.1. Example 4: Initializing an Ethernet Driver
        1. 2.5.1.1. Data Encapsulation [Ethernet Frame]
        2. 2.5.1.2. Media Access Management
        3. 2.5.1.3. CDMA/CD (MAC Sublayer) Transmission Mode
        4. 2.5.1.4. CDMA/CD (MAC Sublayer) Reception Mode
        5. 2.5.1.5. Motorola/Freescale MPC823 Ethernet Example
        6. 2.5.1.6. MPC823 Ethernet Driver Pseudo Code
        7. 2.5.1.7. NetSilicon NET+ARM40 Ethernet Example
          1. NET+ARM40 Pseudo Code
      2. 2.5.2. Example 5: Initializing an RS-232 Driver
        1. 2.5.2.1. Motorola/Freescale MPC823 RS-232 Example
        2. 2.5.2.2. MPC823 Serial Driver Pseudo Code
    6. 2.6. Summary
  7. 3. Embedded Operating Systems
    1. 3.1. In This Chapter
    2. 3.2. What Is a Process?
    3. 3.3. Multitasking and Process Management
      1. 3.3.1. Process Implementation
        1. Example 3.1: Creating a Task in vxWorks
        2. Example 3.2: Jbed RTOS and Task Creation
        3. Example 3.3: Embedded Linux and fork/exec
        4. Example 3.4: vxWorks Wind Kernel and States
        5. Example 3.5: Jbed Kernel and States
        6. Example 3.6: Embedded Linux and States
      2. 3.3.2. Process Scheduling
        1. 3.3.2.1. Preemptive Scheduling and the Real-Time Operating System (RTOS)
          1. Example 3.7: vxWorks Scheduling
          2. Example 3.8: Jbed and EDF Scheduling
          3. Example 3.9: TimeSys Embedded Linux Priority-based Scheduling
      3. 3.3.3. Intertask Communication and Synchronization
        1. Example 3.10: vxWorks Semaphores
        2. Example 3.11: Message Passing in vxWorks
        3. 3.3.3.1. Signals and Interrupt Handling (Management) at the Kernel Level
          1. Example 3.12: Interrupt Handling in vxWorks
    4. 3.4. Memory Management
      1. 3.4.1. User Memory Space
        1. 3.4.1.1. Segmentation
          1. Example 3.13: vxWorks Memory Management and Segmentation
          2. Example 3.14: Jbed Memory Management and Segmentation
          3. Example 3.15: Linux Memory Management and Segmentation
        2. 3.4.1.2. Paging and Virtual Memory
        3. 3.4.1.3. Virtual Memory
      2. 3.4.2. Kernel Memory Space
    5. 3.5. I/O and File System Management
    6. 3.6. OS Standards Example: POSIX (Portable Operating System Interface)
      1. Example 3.16: Linux POSIX Example
      2. Example 3.17: vxWorks POSIX Example
    7. 3.7. OS Performance Guidelines
    8. 3.8. OSes and Board Support Packages (BSPs)
      1. 3.8.1. Advantages and Disadvantages of Real-Time Kernels
    9. 3.9. Summary
  8. 4. Networking
    1. 4.1. Introduction to the RCM3200 Rabbit Core
    2. 4.2. Introduction to the Dynamic C Development Environment
      1. 4.2.1. Development
      2. 4.2.2. Debugging
    3. 4.3. Brief Introduction to Dynamic C Libraries
    4. 4.4. Memory Spaces in Dynamic C
      1. 4.4.1. Rabbit’s Memory Segments
      2. 4.4.2. Dynamic C’s Memory Usage without Separate I & D Space
      3. 4.4.3. Placing Functions in XMEM
      4. 4.4.4. Separate Instruction and Data Memory
      5. 4.4.5. Putting It All Together
    5. 4.5. How Code Is Compiled and Run
      1. 4.5.1. How Code Is Built in Traditional Development Environments
      2. 4.5.2. How Code Is Built with Dynamic C
    6. 4.6. Setting Up a PC as an RCM3200 Development System
    7. 4.7. Time to Start Writing Code!
      1. 4.7.1. Project: Everyone’s First Rabbit Program
      2. 4.7.2. Dynamic C’s Debugging Features
      3. 4.7.3. Dynamic C Help
      4. 4.7.4. Single Stepping
      5. 4.7.5. Adding a Breakpoint
      6. 4.7.6. Watch Expressions
      7. 4.7.7. Dynamic C Is Not ANSI C
      8. 4.7.8. Dynamic C Memory Spaces
    8. 4.8. Embedded Networks
    9. 4.9. Dynamic C Support for Networking Protocols
      1. 4.9.1. Common Networking Protocols
      2. 4.9.2. Optional Modules Available for Dynamic C
    10. 4.10. Typical Network Setup
      1. 4.10.1. Typical Corporate Network
      2. 4.10.2. Typical Home Network
    11. 4.11. Setting Up a Core Module’s Network Configuration
      1. 4.11.1. Setting Up the IP Address
      2. 4.11.2. Link Layer Selection
      3. 4.11.3. TCP/IP Definitions at Compile Time
      4. 4.11.4. TCP/IP Definitions at Runtime
      5. 4.11.5. Debugging Macros for Networking
    12. 4.12. Project 1: Bringing Up a Rabbit Core Module for Networking
      1. 4.12.1. Configuration for Static Addressing
      2. 4.12.2. Configuration for Dynamic Addressing
      3. 4.12.3. A Special Case for Dynamic Addressing
    13. 4.13. The Client Server Paradigm
      1. 4.13.1. What to Be Careful about in Client Server Programming
    14. 4.14. The Berkeley Sockets Interface
      1. 4.14.1. Making a Socket Connection
    15. 4.15. Using TCP versus UDP in an Embedded Application
    16. 4.16. Important Dynamic C Library Functions for Socket Programming
      1. 4.16.1. Functions Used for Connection Initialization or Termination
      2. 4.16.2. Functions Used to Determine Socket Status
      3. 4.16.3. Functions Used to Send or Receive Data
      4. 4.16.4. Blocking versus Nonblocking Functions
    17. 4.17. Project 2: Implementing a Rabbit TCP/IP Server
      1. 4.17.1. The Server TCP/IP State Machine
      2. 4.17.2. Working with General-Purpose TCP Utilities
      3. 4.17.3. Working with a Java TCP/IP Client
      4. 4.17.4. Working with a C++ TCP/IP Client
    18. 4.18. Project 3: Implementing a Rabbit TCP/IP Client
      1. 4.18.1. Disabling the Windows XP Firewall
      2. 4.18.2. Verifying the Client Code
      3. 4.18.3. Working with a Java TCP/IP Server
      4. 4.18.4. Working with a TCP/IP Server in C#
    19. 4.19. Project 4: Implementing a Rabbit UDP Server
      1. 4.19.1. Working with a Java UDP Client
      2. 4.19.2. Working with a C++ UDP Client
    20. 4.20. Some Useful (and Free!) Networking Utilities
      1. 4.20.1. Ping
      2. 4.20.2. Traceroute
      3. 4.20.3. Ethereal
      4. 4.20.4. Netcat
      5. 4.20.5. Online Tools
    21. 4.21. Final Thought
  9. 5. Error Handling and Debugging
    1. 5.1. The Zen of Embedded Systems Development and Troubleshooting
      1. 5.1.1. The DEVELOPER Hat
      2. 5.1.2. Regression Testing—Test Early and Test Often
      3. 5.1.3. Case Study—Big Bang Integration and No Regression Test Suite
      4. 5.1.4. The FINDER Hat
      5. 5.1.5. The FIXER Hat
    2. 5.2. Avoid Debugging Altogether—Code Smart
      1. 5.2.1. Guideline #1: Use Small Functions
      2. 5.2.2. Guideline #2: Use Pointers with Great Care
      3. 5.2.3. Guideline #3: Comment Code Well
      4. 5.2.4. Guideline #4: Avoid “Magic Numbers”
    3. 5.3. Proactive Debugging
    4. 5.4. Stacks and Heaps
    5. 5.5. Seeding Memory
    6. 5.6. Wandering Code
    7. 5.7. Special Decoders
    8. 5.8. MMUs
    9. 5.9. Conclusion
    10. 5.10. Implementing Downloadable Firmware with Flash Memory
    11. 5.11. The Microprogrammer
    12. 5.12. Advantages of Microprogrammers
    13. 5.13. Disadvantages of Microprogrammers
    14. 5.14. Receiving a Microprogrammer
    15. 5.15. A Basic Microprogrammer
    16. 5.16. Common Problems and Their Solutions
      1. 5.16.1. Debugger Doesn’t Like Writeable Code Space
      2. 5.16.2. Debugger Doesn’t Like Self-relocating Code
      3. 5.16.3. Can’t Generate Position-independent Code
      4. 5.16.4. No Firmware at Boot Time
      5. 5.16.5. Persistent Watchdog Time-out
      6. 5.16.6. Unexpected Power Interruption
    17. 5.17. Hardware Alternatives
      1. 5.17.1. Separating Code and Data
      2. 5.17.2. Flexible and Safe
    18. 5.18. Memory Diagnostics
    19. 5.19. ROM Tests
    20. 5.20. RAM Tests
    21. 5.21. Nonvolatile Memory
    22. 5.22. Supervisory Circuits
    23. 5.23. Multibyte Writes
    24. 5.24. Testing
    25. 5.25. Conclusion
    26. 5.26. Building a Great Watchdog
    27. 5.27. Internal WDTs
    28. 5.28. External WDTs
    29. 5.29. Characteristics of Great WDTs
    30. 5.30. Using an Internal WDT
    31. 5.31. An External WDT
    32. 5.32. WDTs for Multitasking
    33. 5.33. Summary and Other Thoughts
  10. 6. Hardware/Software Co-Verification
    1. 6.1. Embedded System Design Process
      1. 6.1.1. Requirements
      2. 6.1.2. System Architecture
      3. 6.1.3. Microprocessor Selection
      4. 6.1.4. Hardware Design
      5. 6.1.5. Software Design
      6. 6.1.6. Hardware and Software Integration
    2. 6.2. Verification and Validation
      1. 6.2.1. Verification: Does It Work?
      2. 6.2.2. Validation: Did We Build the Right Thing?
    3. 6.3. Human Interaction
    4. 6.4. Co-Verification
      1. 6.4.1. History of Hardware/Software Co-Verification
        1. 6.4.1.1. Commercial Co-Verification Tools Appear
      2. 6.4.2. Co-Verification Defined
        1. 6.4.2.1. Definition
        2. 6.4.2.2. Benefits of Co-Verification
        3. 6.4.2.3. Project Schedule Savings
        4. 6.4.2.4. Co-Verification Enables Learning by Providing Visibility
        5. 6.4.2.5. Co-Verification Improves Communication
        6. 6.4.2.6. Co-Verification versus Co-Simulation
        7. 6.4.2.7. Co-Verification versus Codesign
        8. 6.4.2.8. Is Co-Verification Really Necessary?
      3. 6.4.3. Co-Verification Methods
        1. 6.4.3.1. Native Compiling Software
        2. 6.4.3.2. Instruction Set Simulation
        3. 6.4.3.3. Hardware Stubs
        4. 6.4.3.4. Real-Time Operating System (RTOS) Simulator
        5. 6.4.3.5. Microprocessor Evaluation Board
        6. 6.4.3.6. Waveforms, Log Files, and Disassembly
      4. 6.4.4. A Sample of Co-Verification Methods
        1. 6.4.4.1. Host-Code Mode with Logic Simulation
        2. 6.4.4.2. Instruction Set Simulation with Logic Simulation
        3. 6.4.4.3. C Simulation
        4. 6.4.4.4. RTL Model of CPU with Software Debugging
        5. 6.4.4.5. Hardware Model with Logic Simulation
        6. 6.4.4.6. Evaluation Board with Logic Simulation
        7. 6.4.4.7. In-Circuit Emulation
        8. 6.4.4.8. FPGA Prototype
      5. 6.4.5. Co-Verification Metrics
        1. 6.4.5.1. Performance
        2. 6.4.5.2. Verification Accuracy
        3. 6.4.5.3. AHB Arbitration and Cycle Accuracy Issues
        4. 6.4.5.4. Modeling Summary
        5. 6.4.5.5. Synchronization
        6. 6.4.5.6. Types of Software
        7. 6.4.5.7. Other Metrics
  11. 7. Techniques for Embedded Media Processing
    1. 7.1. A Simplified Look at a Media Processing System
      1. 7.1.1. Core Processing
      2. 7.1.2. Input/Output Subsystems—Peripheral Interfaces
        1. 7.1.2.1. Subsystem Control—Low-Speed Serial Interfaces
        2. 7.1.2.2. Storage
        3. 7.1.2.3. Connectivity
        4. 7.1.2.4. Data Movement
      3. 7.1.3. Memory Subsystem
    2. 7.2. System Resource Partitioning and Code Optimization
    3. 7.3. Event Generation and Handling
      1. 7.3.1. System Interrupts
    4. 7.4. Programming Methodology
    5. 7.5. Architectural Features for Efficient Programming
      1. 7.5.1. Multiple Operations per Cycle
      2. 7.5.2. Hardware Loop Constructs
      3. 7.5.3. Specialized Addressing Modes
        1. 7.5.3.1. Byte Addressability
        2. 7.5.3.2. Circular Buffering
        3. 7.5.3.3. Bit Reversal
      4. 7.5.4. Interlocked Instruction Pipelines
    6. 7.6. Compiler Considerations for Efficient Programming
      1. 7.6.1. Choosing Data Types
        1. 7.6.1.1. Arrays versus Pointers
        2. 7.6.1.2. Division
        3. 7.6.1.3. Loops
        4. 7.6.1.4. Data Buffers
        5. 7.6.1.5. Intrinsics and In-lining
        6. 7.6.1.6. Volatile Data
    7. 7.7. System and Core Synchronization
      1. 7.7.1. Load/Store Synchronization
      2. 7.7.2. Ordering
      3. 7.7.3. Atomic Operations
    8. 7.8. Memory Architecture—the Need for Management
      1. 7.8.1. Memory Access Trade-offs
      2. 7.8.2. Instruction Memory Management—to Cache or to DMA?
      3. 7.8.3. Data Memory Management
        1. 7.8.3.1. What about Data Cache?
      4. 7.8.4. System Guidelines for Choosing between DMA and Cache
        1. 7.8.4.1. Instruction Cache, Data DMA
        2. 7.8.4.2. Instruction Cache, Data DMA/Cache
        3. 7.8.4.3. Instruction DMA, Data DMA
      5. 7.8.5. Memory Management Unit (MMU)
        1. 7.8.5.1. CPLB Management
        2. 7.8.5.2. Memory Translation
    9. 7.9. Physics of Data Movement
      1. 7.9.1. Grouping Like Transfers to Minimize Memory Bus Turnarounds
      2. 7.9.2. Understanding Core and DMA SDRAM Accesses
      3. 7.9.3. Keeping SDRAM Rows Open and Performing Multiple Passes on Data
      4. 7.9.4. Optimizing the System Clock Settings and Ensuring Refresh Rates Are Tuned for the Speed at Which SDRAM Runs
      5. 7.9.5. Exploiting Priority and Arbitration Schemes between System Resources
    10. 7.10. Media Processing Frameworks
      1. 7.10.1. What Is a Framework?
    11. 7.11. Defining Your Framework
      1. 7.11.1. The Application Timeline
        1. 7.11.1.1. Evaluating Bandwidth
          1. Processor Bandwidth
          2. DMA Bandwidth
          3. Memory Bandwidth
    12. 7.12. Asymmetric and Symmetric Dual-Core Processors
    13. 7.13. Programming Models
      1. 7.13.1. Asymmetric Programming Model
      2. 7.13.2. Homogeneous Programming Model
        1. 7.13.2.1. Master-Slave Programming Model
        2. 7.13.2.2. Pipelined Programming Model
    14. 7.14. Strategies for Architecting a Framework
      1. 7.14.1. Processing Data On-the-Fly
      2. 7.14.2. Programming Ease Trumps Performance
      3. 7.14.3. Performance-based Framework
        1. 7.14.3.1. Image Pipe and Compression Example
        2. 7.14.3.2. High Performance Decoder Example
      4. 7.14.4. Framework Tips
    15. 7.15. Other Topics in Media Frameworks
      1. 7.15.1. Audio-Video Synchronization
      2. 7.15.2. Managing System Flow
      3. 7.15.3. Frameworks and Algorithm Complexity
  12. 8. DSP in Embedded Systems
    1. 8.1. Overview of Embedded Systems and Real-Time Systems
    2. 8.2. Real-Time Systems
      1. 8.2.1. Types of Real-Time Systems—Soft and Hard
    3. 8.3. Hard Real-Time and Soft Real-Time Systems
      1. 8.3.1. Introduction
      2. 8.3.2. Differences between Real-Time and Time-Shared Systems
      3. 8.3.3. DSP Systems Are Hard Real-Time
        1. 8.3.3.1. Based on Signal Sample, Time to Perform Actions Before Next Sample Arrives
        2. 8.3.3.2. Hard Real-Time Systems
      4. 8.3.4. Real-Time Event Characteristics—Real-Time Event Categories
    4. 8.4. Efficient Execution and the Execution Environment
      1. 8.4.1. Efficiency Overview
      2. 8.4.2. Resource Management
    5. 8.5. Challenges in Real-Time System Design
      1. 8.5.1. Response Time
      2. 8.5.2. Recovering from Failures
      3. 8.5.3. Distributed and Multiprocessor Architectures
      4. 8.5.4. Embedded Systems
        1. 8.5.4.1. Embedded Systems Are Reactive Systems
    6. 8.6. Summary
    7. 8.7. Overview of Embedded Systems Development Life Cycle Using DSP
    8. 8.8. The Embedded System Life Cycle Using DSP
      1. 8.8.1. Step 1—Examine the Overall Needs of the System
        1. 8.8.1.1. What Is a DSP Solution?
      2. 8.8.2. Step 2—Select the Hardware Components Required for the System
      3. 8.8.3. Hardware Gates
      4. 8.8.4. Software-Programmable
      5. 8.8.5. General-Purpose Processors
      6. 8.8.6. Microcontrollers
      7. 8.8.7. FPGA Solutions
      8. 8.8.8. Digital Signal Processors
      9. 8.8.9. A General Signal Processing Solution
      10. 8.8.10. DSP Acceleration Decisions
      11. 8.8.11. Step 3—Understand DSP Basics and Architecture
      12. 8.8.12. Models of DSP Processing
      13. 8.8.13. Input/Output Options
      14. 8.8.14. Calculating DSP Performance
      15. 8.8.15. DSP Software
      16. 8.8.16. DSP Frameworks
    9. 8.9. Optimizing DSP Software
    10. 8.10. What Is Optimization?
    11. 8.11. The Process
    12. 8.12. Make the Common Case Fast
    13. 8.13. Make the Common Case Fast—DSP Architectures
    14. 8.14. Make the Common Case Fast—DSP Algorithms
    15. 8.15. Make the Common Case Fast—DSP Compilers
    16. 8.16. An In-Depth Discussion of DSP Optimization
    17. 8.17. Direct Memory Access
    18. 8.18. Using DMA
      1. 8.18.1. Staging Data
        1. 8.18.1.1. An Example
      2. 8.18.2. Pending versus Polling
      3. 8.18.3. Managing Internal Memory
    19. 8.19. Loop Unrolling
      1. 8.19.1. Filling the Execution Units
      2. 8.19.2. Reducing Loop Overhead
      3. 8.19.3. Fitting the Loop to Register Space
      4. 8.19.4. Trade-offs
    20. 8.20. Software Pipelining
      1. 8.20.1. An Example
        1. 8.20.1.1. A Serial Implementation
        2. 8.20.1.2. A Minimally Parallel Implementation
        3. 8.20.1.3. Compiler-Generated Pipeline
        4. 8.20.1.4. An Implementation with Restrict Keyword
      2. 8.20.2. Enabling Software Pipelining
      3. 8.20.3. Interrupts and Pipelined Code
    21. 8.21. More on DSP Compilers and Optimization
      1. 8.21.1. Compiler Architecture and Flow
      2. 8.21.2. Compiler Optimizations
        1. 8.21.2.1. Instruction Selection
        2. 8.21.2.2. Latency and Instruction Scheduling
        3. 8.21.2.3. Register Allocation
      3. 8.21.3. Compile Time Options
        1. 8.21.3.1. Understanding What the Compiler Is Thinking
    22. 8.22. Programmer Helping Out the Compiler
      1. 8.22.1. Pragmas
      2. 8.22.2. Intrinsics
      3. 8.22.3. Keywords
      4. 8.22.4. Inlining
      5. 8.22.5. Reducing Stack Access Time
      6. 8.22.6. Compilers Helping Out the Programmer
      7. 8.22.7. Summary of Coding Guidelines
    23. 8.23. Profile-Based Compilation
      1. 8.23.1. Advantages
      2. 8.23.2. Issues with Debugging Optimized Code
      3. 8.23.3. Summary of the Code Optimization Process
      4. 8.23.4. Summary
    24. 8.24. References
  13. 9. Practical Embedded Coding Techniques
    1. 9.1. Reentrancy
    2. 9.2. Atomic Variables
    3. 9.3. Two More Rules
    4. 9.4. Keeping Code Reentrant
    5. 9.5. Recursion
    6. 9.6. Asynchronous Hardware/Firmware
    7. 9.7. Race Conditions
    8. 9.8. Options
    9. 9.9. Other RTOSes
    10. 9.10. Metastable States
    11. 9.11. Firmware, Not Hardware
    12. 9.12. Interrupt Latency
    13. 9.13. Taking Data
    14. 9.14. Understanding Your C Compiler: How to Minimize Code Size
    15. 9.15. Modern C Compilers
      1. 9.15.1. The Structure of a Compiler
      2. 9.15.2. The Meaning of a Program
      3. 9.15.3. Basic Transformations
      4. 9.15.4. Register Allocation
      5. 9.15.5. Function Calls
      6. 9.15.6. Function Inlining
      7. 9.15.7. Low-Level Code Compression
      8. 9.15.8. Linker
      9. 9.15.9. Controlling Compiler Optimization
      10. 9.15.10. Memory Model
    16. 9.16. Tips on Programming
      1. 9.16.1. Use the Right Data Size
      2. 9.16.2. Use the Best Pointer Types
      3. 9.16.3. Structures and Padding
      4. 9.16.4. Use Function Prototypes
      5. 9.16.5. Use Parameters
      6. 9.16.6. Do Not Take Addresses
      7. 9.16.7. Do Not Use Inline Assembly Language
      8. 9.16.8. Do Not Write Clever Code
      9. 9.16.9. Use Switch for Jump Tables
      10. 9.16.10. Investigate Bit Fields Before Using Them
      11. 9.16.11. Watch Out for Library Functions
      12. 9.16.12. Use Extra Hints
    17. 9.17. Final Notes
    18. 9.18. Acknowledgments
  14. 10. Development Technologies and Trends
    1. 10.1. How to Choose a CPU for Your System on Chip Design
      1. 10.1.1. Design Complexity
      2. 10.1.2. Design Reuse
      3. 10.1.3. Memory Architecture and Protection
      4. 10.1.4. CPU Performance
      5. 10.1.5. Power Consumption
      6. 10.1.6. Costs
      7. 10.1.7. Software Issues
      8. 10.1.8. Multicore SoCs
      9. 10.1.9. Conclusions
    2. 10.2. Emerging Technology for Embedded Systems Software Development
      1. 10.2.1. Microprocessor Device Technology
      2. 10.2.2. System Architecture
      3. 10.2.3. Design Composition
      4. 10.2.4. Software Content
      5. 10.2.5. Programming Languages
      6. 10.2.6. Software Team Size and Distribution
      7. 10.2.7. UML and Modeling
      8. 10.2.8. Key Technologies
      9. 10.2.9. Conclusions
    3. 10.3. Making Development Tool Choices
      1. 10.3.1. The Development Tool Chain
      2. 10.3.2. Compiler Features
      3. 10.3.3. Extensions for Embedded Systems
        1. 10.3.3.1. Impact of Real-Time Systems
      4. 10.3.4. Optimizations
      5. 10.3.5. Build Tools: Key Issues Recapped
      6. 10.3.6. Debugging
        1. 10.3.6.1. Debugger Features
        2. 10.3.6.2. Development Phases
        3. 10.3.6.3. Native Debugger
        4. 10.3.6.4. Debugger with Simulator
        5. 10.3.6.5. Debugger with ICE Interface
        6. 10.3.6.6. Debugger with Monitor
        7. 10.3.6.7. Debugger with Hardware Assist
        8. 10.3.6.8. Debugger with RTOS
      7. 10.3.7. Debug Tools: Key Issues Recapped
      8. 10.3.8. Standards and Development Tool Integration
      9. 10.3.9. Implications of Selections
        1. 10.3.9.1. Target Chips
        2. 10.3.9.2. Host Computers
        3. 10.3.9.3. RTOS
      10. 10.3.10. Conclusions
    4. 10.4. Eclipse—Bringing Embedded Tools Together
      1. 10.4.1. Eclipse Platform Philosophy
      2. 10.4.2. Platform
      3. 10.4.3. How Eclipse Gets Embedded
      4. 10.4.4. Conclusions
    5. 10.5. Embedded Software and UML
      1. 10.5.1. Why Model in UML?
      2. 10.5.2. Separating Application from Architecture
        1. 10.5.2.1. Blueprint Development
        2. 10.5.2.2. What’s Wrong with That?
        3. 10.5.2.3. Model Compilers
        4. 10.5.2.4. Sets, States, and Functions
        5. 10.5.2.5. Rules
        6. 10.5.2.6. Open Translation
      3. 10.5.3. xtUML Code Generation
      4. 10.5.4. Conclusions
    6. 10.6. Model-based Systems Development with xtUML
      1. 10.6.1. Why Is Building an Embedded System so Difficult?
        1. 10.6.1.1. Every Project Has at Least Two Fundamental Challenges
          1. Integration: Where the Fun Begins
        2. 10.6.1.2. So What’s a Few Interface Problems Among Friends?
        3. 10.6.1.3. The Suboptimal Partition
        4. 10.6.1.4. The State of the Practice
      2. 10.6.2. A Better Solution
        1. 10.6.2.1. Interface Problems?
        2. 10.6.2.2. What about the Partition?
      3. 10.6.3. Experience to Date
    7. 10.7. The Future