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Embedded Firmware Solutions: Development Best Practices for the Internet of Things

Book Description

Embedded Firmware Solutions is the perfect introduction and daily-use field guide--for the thousands of firmware designers, hardware engineers, architects, managers, and developers--to Intel’s new firmware direction (including Quark coverage), showing how to integrate Intel® Architecture designs into their plans.

Featuring hands-on examples and exercises using Open Source codebases, like Coreboot and EFI Development Kit (tianocore) and Chromebook, this is the first book that combines a timely and thorough overview of firmware solutions for the rapidly evolving embedded ecosystem with in-depth coverage of requirements and optimization.

Table of Contents

  1. Cover
  2. Title
  3. Copyright
  4. About ApressOpen
  5. Contents at a Glance
  6. Contents
  7. About the Authors
  8. About the Technical Reviewers
  9. Acknowledgments
  10. Foreword
  11. Introduction
  12. Chapter 1: Introduction
    1. What Is Embedded Firmware?
    2. Where Is Firmware?
    3. What Do Firmware Engineers Do?
    4. Firmware Preparation for New Hardware
    5. The Mystery of Bits
    6. Programming Guides
    7. The Intel® Firmware Support Package
    8. The Uniqueness of Embedded Firmware
    9. The Choice of Firmware Stacks
    10. Welcome to the Era of the Internet of Things
    11. Technical Coverage in This Book
    12. The Future of Firmware
  13. Chapter 2: Firmware Stacks for Embedded Systems
    1. Is a One-Size-Fits-All Solution Possible?
    2. Microkernel
    3. Real-Time Operating System (RTOS)
    4. Legacy BIOS
    5. Implementations of the UEFI Framework
    6. Open Source Firmware Stacks
    7. Proprietary Firmware Stacks
    8. Make or Buy
      1. The Advantages of Outsourcing
      2. The Disadvantages of Outsourcing
      3. In-House Development
    9. Summary
  14. Chapter 3: Intel® Firmware Support Package (Intel® FSP)
    1. The Intel FSP Philosophy
    2. What Is in Intel FSP?
    3. Intel FSP Binary Format
    4. Sample Boot Flow
    5. Locating the Entries of Intel FSP
      1. The Hard Way to Find Intel FSP APIs: Use Data Structure
      2. The Easy Way to Find FSP APIs: Use Hard-Coded Constants
    6. Programming Interface: The APIs of Intel FSP
      1. TempRamInit
      2. FspInitEntry
      3. NotifyPhase
    7. Intel FSP Output
      1. API Execution Status
      2. Temporary Memory Data HOB
      3. Non-Volatile Storage HOB
      4. Sample Code for Parsing HOBs
    8. Customization of Intel FSP
    9. Downloading Intel FSP
    10. Microcode Patches
    11. Relocating Intel FSP
    12. Integration and Build
    13. The Future of Intel FSP
    14. What Is Coming in the Following Chapters
  15. Chapter 4: Building coreboot with Intel FSP
    1. The Introduction of coreboot
    2. The Philosophy of coreboot
    3. A Brief History
      1. v1: 1999–2000
      2. v2: 2000–2005
      3. v2+: 2005–2008
      4. v3: 2006–2008
      5. 2008 LinuxBIOS Renamed “coreboot”
      6. v4: 2009–2012
      7. v4+: 2012–2014
      8. Further Reading
    4. Prerequisites for Working with coreboot
      1. Community Organization
      2. Git and Gerrit
      3. Git Commit Messages
      4. coreboot Sign-off Procedure
    5. Working with the coreboot Community
      1. coreboot Do’s
      2. coreboot Don’ts
      3. Nonsource Binaries in coreboot
    6. A Hands-on Example: Building coreboot for the MinnowBoard MAX Mainboard
      1. Environment
      2. Development Directory
      3. Downloading Intel FSP
      4. Installing Intel FSP
      5. Downloading the coreboot Source
      6. coreboot Toolchain
      7. coreboot Commit Hooks
      8. Creating a coreboot Development Branch
      9. Building the Mainboard
      10. Flashing the ROM
    7. coreboot Internals
      1. Boot Stages
      2. Additional Files
      3. CBFS
      4. CBFS Size
      5. Special Binaries
    8. Boot Flow Using Intel FSP
      1. Reset Vector and Bootblock
      2. romstage
      3. ramstage
      4. Payload
    9. coreboot Source
      1. coreboot Device Tree
      2. coreboot Hardwaremain State Machine
      3. Mainboard
      4. The Chipset Driver
    10. coreboot Troubleshooting and Debugging
      1. Postcodes
      2. Serial Debug
      3. EHCI USB Debug
    11. Summary
  16. Chapter 5: Chrome book Firmware Internals
    1. About Chrome book and Chrome OS
    2. Chrome OS Firmware Overview
    3. Chrome OS Security Philosophy
    4. Chrome OS Security Guiding Principles
    5. Power wash
    6. Chrome OS Boot Modes
      1. Verified (Normal) Mode
      2. Recovery Mode
      3. Developer Mode
    7. Chrome OS Coreboot
      1. x86
      2. ARM
    8. Depth charge Payload
      1. libpayload
      2. Verified Boot
      3. Verified Boot and Kernel Security
    9. Chrome OS Firmware Boot Log
      1. Boot Times Log
    10. Chrome OS Firmware Event Log
      1. Google SMI Linux Kernel Driver
    11. Chrome OS Extensions to the Firmware Image
      1. FMAP
      2. Google Binary Block (GBB)
      3. Vital Product Data (VPD)
      4. Firmware TPM Usage
    12. Chrome OS Firmware Update
    13. Chrome OS Utilities
      1. flashrom
      2. gbb_utility
      3. crossystem
      4. mosys
    14. Google Embedded Controller
      1. Power Sequencing
      2. Battery Charging
      3. Thermal Management
      4. Keyboard Controller
      5. Other Peripheral Controls
      6. Chrome EC Software Sync
    15. Summary
  17. Chapter 6: Intel FSP and UEFI Integration
    1. Introduction to EFI
      1. Introduction to FSP
      2. Introduction to EDK II
      3. Summary
    2. FSP Components
    3. FSP Wrapper Boot Flow
      1. Generic FSP Wrapper Boot Flow
    4. Normal Boot
      1. Boot Flow
      2. Memory Layout for a Normal Boot Flow
      3. FSP Normal Boot Data Structure
    5. S3 Boot
      1. Boot Flow
      2. S3 Memory Layout
      3. S3 NV Data Passing
    6. Capsule Flash Update
      1. Boot Flow
      2. Capsule Update Memory Layout
      3. Recovery Boot Flow
      4. FSP Recovery Memory Layout
    7. coreboot Payload Based upon EDK II
    8. Building Minnow and MinnowMax with FSP
    9. Future of the Intel FSP
    10. Conclusion
  18. Chapter 7: Building Firmware for Quark Processors
    1. Overview of UEFI and PI
      1. History of Implementations and Specifications
    2. Introduction to EDK II Building Blocks
      1. PKG: Packaging
      2. Packages
      3. PCD: Platform Configuration Database
      4. DEC: Platform Declaration File
      5. DSC: Platform Description File
      6. FDF: Flash Description File
      7. Build: The EDK II Build Command
      8. INF: INF File
      9. More Information
    3. Introduction to the EDK II Subset
    4. Introduction to Quark
      1. ROM Flash Image Size Optimization
      2. RAM Footprint Optimization
    5. Conclusion
  19. Chapter 8: Putting It All Together
    1. RTOS and Intel FSP
    2. Intel FSP and Open Source Philosophy
    3. Customization and Production of Intel FSP
    4. It Is a Community Effort After All
  20. Appendix A: Sample Boot Setting File (BSF)
  21. Index