Digital Logic Design, 4th Edition

3

Karnaugh maps and function simplification

3.2 Introduction

One of the objectives of the digital designer when using discrete gates is to keep the number of gates to a minimum when implementing a Boolean function. The smaller the number of gates used, the lower the cost of the circuit. Simplification could be achieved by a purely algebraic process, but this can be tedious, and the designer is not always sure that the simplest solution has been produced at the end of the process.

A much easier method of simplification is to plot the function on a Karnaugh map (or ‘K-map’) and with the help of a number of simple rules to reduce the Boolean function to its minimal form. This particular method is very straightforward up to and including six variables. ...