6.2 More About Characteristic Impedance

Signal integrity in high speed digital design is closely related to the control of characteristic impedance. As rise and fall times get shorter, the problem of control becomes more and more critical. At clock rates of 1 GHz, all logic lines must be either series or parallel terminated to avoid overshoots. Stubs of any length must be avoided, as the delays that result can impact performance.

There are many variables that affect the characteristic impedance of traces, which cannot be easily put into an equation. For example, the published equations relate to rectangular traces. In practice, traces have rounded edges and copper etching and plating modifies trace width and shape. The characteristic impedance is also affected by the presence of nearby traces. Resistors that are used for line terminations have parasitics that influence their performance. The presence of a resistor modifies the trace spacing, and this affects the characteristic impedance. Terminations are often capacitive, and this modifies the nature of any reflection. In outer layers, the need to deposit copper in drilled holes causes added copper to be deposited on traces. This added thickness modifies the characteristic impedance. Unused portions of a via that extend through a circuit board can act as a stub. Removing this unused copper adds board cost.

Dielectric constants vary from point-to-point across a board. One cause for this variation is that the dielectric constant ...

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