2.4. A Systematic MPSOC Design Flow

Just as an ad-hoc architectural approach to skyscrapers and other large civil structures produces jumbled, inefficient buildings, the ad-hoc approach to system architectures produces inefficient electronic systems for complex applications. Figure 2.10 presents a detailed, systematic flow for efficient MPSOC design. This diagram dovetails with the ASIC design flow shown in Figure 2.2. Instead of corralling the system-design process into one small process box, the MPSOC design flow encapsulates the ASIC implementation flow in one box and details the tasks required to create an overall design that meets system-design goals. Because SOC prototyping is next to impossible, this systematic approach to MPSOC design ...

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