As with instruction sets, the ARM and C55x manuals provide good descriptions of exceptions, memory management, and caches for those processors. Patterson and Hennessy [Pat98] provide a thorough description of computer architecture, including pipelining, caches, and memory management.
Q3-1 Why do most computer systems use memory-mapped I/O?
Q3-2 Why do most programs use interrupt-driven I/O over busy/wait?
Q3-3 Write ARM code that tests a register at location ds1 and continues execution only when the register is nonzero.
Q3-4 Write ARM code that waits for the low-order bit of device register ds1 to become 1 and then reads a value from register dd1.
Q3-5 Implement peek() and poke() in assembly language for ARM.
Q3-6 Draw ...