Chapter 4. Connectivity 117
Advantages
The advantages of implementing an OSA-Express port in QDIO mode over non-QDI O (for
example, LCS) are:
IP-Assist to handle MAC addressing, ARP processing, some filtering
Dynamically maintains the OSA Address Table in a shared environment
Supports high-speed LPAR-to-LPAR communication
Direct Memory Access (DMA) protocol reduces IO interrupts
Supports outbound priority queuing
Network definitions built dynamically
Only QDIO is capable of delivering high-bandwidth and high-speed networking
Supports VLAN IDs to isolate services without creating independent TCP/IP stacks
Considerations
When planning connectivity for a LAN environment, there may not be a requirement to isolate
data traffic or services for certain servers or clients as we have shown in this scenario.
Hence, VLAN IDs can be omitted.
If there is a requirement for VLANs, however, we recommend adding the VLAN IDs to your IP
addressing scheme to aid in the mapping of IP addresses to VLANs based on data traffic
patterns or access to resources.
Also, to simplify administration and management of VLANs consider using Generic Attribute
VLAN Registration Protocol wherever possible. For details, refer to “VLAN support of Generic
Attribute Registration Protocol - GVRP” on page 109.
4.3.2 HiperSockets connectivity
HiperSockets provides very fast TCP/IP communications between different Logical Partitions
(LPARs) through the system memory of the System z9 or zSeries server. The LPARs that are
so connected form an
internal LAN, passing data between the LPARs at memory speeds,
and thereby totally eliminating the I/O subsystem overhead and external network delays.
To create this scenario, we define the HiperSockets, which is represented by the IQD CHPID
and its associated devices. All LPARs that are configured to use the shared IQD CHPID have
internal connectivity and therefore have the capability to communicate using HiperSockets.
In our test environment we will use two IQD CHPIDs, F4 and F5. Each one of them will create
a separate logical LAN with its own subnetwork. Figure 4-9 on page 118 depicts these
interfaces to our test scenario.