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BeagleBone Essentials by Rodolfo Giometti

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The electrical lines

The SPI bus lines are reported in the following table:

Name

Description

SCLK: Serial clock

This is the bus clock signal

MOSI: Master Out Slave In

This is the bus data signal (Master Output Slave Input)

MISO: Master In Slave Out

This is the bus data signal (Master Input Slave Output)

SS: Slave Select

This is the chip or slave select signal (one per slave)

GND

This is the common ground

Tip

It's quite common that an SPI controller has a few SS lines (usually 2 or 3), so when more SPI devices are needed at once, a trick must be used. The solution is to generate the needed SS signals using the common GPIO lines managed by the driver, instead of by the controller hardware itself.

Despite the fact that this behavior can ...

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