Inform all the troops that communications have completely broken down.
This “telephone” has too many shortcomings to be seriously considered as a means of communication. The device is inherently of no value to us.
—Western Union internal memo, 1876
In this chapter we describe a method for the specification of asynchronous systems at a high level through the use of a communication channel model. Any hardware system, synchronous or asynchronous, can be thought of as a set of concurrently operating processes. These processes periodically must communicate data between each other. For example, if one process is a register file and another is an ALU, the register file must communicate operands to the ALU, and the ALU must communicate a result back to the register file. In the channel model, this communication takes places when one process attempts to send a message along a channel while another is attempting to receive a message along the same channel. We have implemented a package in VHDL to provide a channel abstraction. In this chapter we give a brief overview of VHDL and how to use our package. Since it is beyond the scope of this book to teach VHDL, we primarily provide templates that will allow you to use VHDL to simulate asynchronous systems without needing a thorough understanding of the language.
Each module that you specify using our channel model will have the same basic structure. A channel is simply a point-to-point ...