ARM System Developer's Guide

APPENDIX D

INSTRUCTION CYCLE TIMINGS

D.1. USING THE INSTRUCTION CYCLE TIMING TABLES

D.2. ARM7TDMI INSTRUCTION CYCLE TIMINGS

D.3. ARM9TDMI INSTRUCTION CYCLE TIMINGS

D.4. STRONGARM! INSTRUCTION CYCLE TIMINGS

D.5. ARM9E INSTRUCTION CYCLE TIMINGS

D.6. ARM10E INSTRUCTION CYCLE TIMINGS

D.7. INTEL XSCALE INSTRUCTION CYCLE TIMINGS

D.8. ARM11 CYCLE TIMINGS

This appendix lists the instruction cycle timings for some common ARM implementions. Timings can vary between different revisions of an implementation and are also affected by external events such as interrupts, memory speed, and cache misses. You should treat these numbers as a guide only and verify performance measurements on real hardware. Refer to the manufacturer’s data sheets for the latest ...