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Architecture Design for Soft Errors by Shubu Mukherjee

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CHAPTER 2

Device- and Circuit-Level Modeling, Measurement, and Mitigation

2.1 Overview

Analysis of SERs in silicon chips requires an understanding of the impact of alpha particle and neutron strikes on transistor devices, circuit elements, and architectural structures. Chapter 1 covered the basic physics of the interactions of alpha particles and neutrons with transistor devices. Subsequent chapters cover the impact of these errors at the architectural level. This chapter examines how transistors and circuit elements react and respond to alpha- and neutron-induced transient faults. More specifically, this chapter describes current practices to model, measure, and mitigate soft errors in transistor devices and circuit elements.

Computing the ...

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