C.1. DC (Bias) Analysis

The two common-emitter amplifier-stage configurations studied in projects are shown in Fig. C.1. We note that the dc circuit of Fig. C.1(a) is that of Fig. B.12. Amplifier performance analysis can be performed with the two output channels available from the DAQ in the following manner: Fig. C.1(a) uses separate channels for the input and output bias circuits and superimposes the input signal on the input bias. In Fig. C.1(b) we add a signal-source resistor and coupling capacitor and use one channel for the input signal and one channel for bias. The capacitor is required to prevent the connection of the signal source from affecting the dc (bias) operation of the circuit. The latter represents the classical practical common-emitter ...

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