13.3. Stabilization of Signal Gain and Bias Current with a Source Resistor
The amplifier of Fig. 13.1 is not a good design in terms of bias stability. Bias current ID3 (of M3) in the circuit of Fig. 13.1 is very sensitive to the voltage across RD2, which, in a relative sense, is only marginally predictable, given the normal variation in device parameters and circuit components. Also, as in the bias-stability discussion of Unit 5.5 on the design of the NMOS common-source amplifier, for a constant VGS3, bias current ID3 is sensistive to changes in transitor parameters. (Note that the differential-amplifier-stage bias current is relatvely stable, as it is a current-source bias current.)
13.3.1. Gain and Gain Stabilization
As noted, it was shown ...
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